ASIC Design Engineer - Logic Design - 2100334
Irvine, CA  / Santa Clara, CA 
Share
Posted 16 days ago
Job Description
About Marvell

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers' current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform-for the better.


The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity

Automotive PHY digital design group

The candidate shall be responsible for the following:

  • Design, develop, implement, test, and document micro-architecture and RTL for reasonably complex design blocks (>1M gates).
  • Work closely with system architecture and chip architecture teams to design automotive quality implementations
  • Participate in the full design development cycle, end-to-end, from writing micro-architecture docs, RTL coding, ASIC synthesis, FPGA support, specifications of timing constraints and working closely for timing closure, closely work with design verification teams to review test-plans and execution of test coverage to automotive quality, ability to bring up block tests on silicon during lab testing, and maintenance of designed blocks are reusable IPs.
  • Produce comprehensive ASIC block uArch and regSpec. Schedule detailed reviews with cross-functional teams and follow automotive processes of closing requirements against implementations
  • Evaluate and participate in improving design and verification methodologies including automating processes or evaluating state-of-the-art tools.

MSEE with 3-6 years of relevant IC design experience.

The candidate must possess demonstrated work experience in following areas:

  • Creating micro-architectural specs from standards, architectural specifications
  • System Verilog RTL coding with System Verilog Assertions
  • Register spec description with SystemRDL
  • Creating reusable design components, clock/reset modules, lower power management modules, multiple clock domain based designs

#LI-KB1

The Perks

With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.

Your Future

Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at or 408-222-3604.

 

Job Summary
Start Date
As soon as possible
Employment Term and Type
Regular, Full Time
Required Experience
3 to 6 years
Email this Job to Yourself or a Friend
Indicates required fields